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Computer Organization
Computer Arithmetic
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Pipelining
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Machine Instructions and Addressing Modes
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Memory Interfacing
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IO Interface
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Alu Data Path and Control Unit
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Secondary Memory
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1
GATE CSE 2013
MCQ (Single Correct Answer)
+1
-0.3
In a $$k$$-way set associative cache, the cache is divided into $$v$$ sets, each of which consists of $$k$$ lines. The lines of a set are placed in sequence one after another. The lines in set $$s$$ are sequenced before the lines in set $$(s+1).$$ The main memory blocks are numbered $$0$$ onwards. The main memory block numbered $$j$$ must be mapped to any one of the cache lines from
A
$${\left( {j\,\,\bmod \,\,v} \right)^ * }k\,\,$$ to $${\left( {j\,\,\bmod \,\,v} \right)^ * }k\, + \,\,\,\,\,\,\left( {k - 1} \right)$$
B
$${\left( {j\,\,\bmod \,\,v} \right)}\,\,$$ to $$\left( {j\,\,\bmod \,\,v} \right)\, + \,\left( {k - 1} \right)$$
C
$${\left( {j\,\,\bmod \,\,k} \right) }\,\,$$ to $$\left( {j\,\,\bmod \,\,k} \right)\, + \,\left( {v - 1} \right)$$
D
$${\left( {j\,\,\bmod \,\,k} \right)^ * }v\,\,$$ to $${\left( {j\,\,\bmod \,\,k} \right)^ * }\,v + \,\left( {v - 1} \right)$$
2
GATE CSE 2012
MCQ (Single Correct Answer)
+1
-0.3
The amount of $$ROM$$ needed to implement a $$4$$ bit multiplier is
A
$$64$$ bits
B
$$128$$ bits
C
$$1$$ $$K$$bits
D
$$2$$ $$K$$bits
3
GATE CSE 2010
MCQ (Single Correct Answer)
+1
-0.3
A main memory unit with a capacity of $$4$$ megabytes is built using $$1M \times 1$$-bit $$DRAM$$ chips. Each $$DRAM$$ chip has $$1K$$ rows of cells with $$1K$$ cells in each row. The time taken for a single refresh operation is $$100$$ nanoseconds. The time required to perform one refresh operation on all the cells in the memory unit is
A
$$100$$ nanoseconds
B
$$100 * {2^{10}}$$ nanoseconds
C
$$100 * {2^{20}}$$ nanoseconds
D
$$3200 * {2^{20}}$$ nanoseconds
4
GATE CSE 2009
MCQ (Single Correct Answer)
+1
-0.3
How many $$32k$$ x $$1$$ $$RAM$$ chips are needed to provide a memory capacity of $$256$$ $$K$$-bytes?
A
$$8$$
B
$$32$$
C
$$64$$
D
$$128$$
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Questions Asked from Marks 1
GATE CSE 2022 (1) GATE CSE 2021 Set 2 (1) GATE CSE 2021 Set 1 (1) GATE CSE 2020 (1) GATE CSE 2019 (2) GATE CSE 2018 (1) GATE CSE 2016 Set 1 (1) GATE CSE 2015 Set 3 (1) GATE CSE 2015 Set 2 (1) GATE CSE 2014 Set 1 (1) GATE CSE 2013 (1) GATE CSE 2012 (1) GATE CSE 2010 (1) GATE CSE 2009 (1) GATE CSE 2007 (1) GATE CSE 2005 (1) GATE CSE 2001 (1) GATE CSE 1999 (1) GATE CSE 1996 (1) GATE CSE 1995 (3)
GATE CSE Subjects
Theory of Computation
Operating Systems
Algorithms
Digital Logic
Database Management System
Data Structures
Computer Networks
Software Engineering
Compiler Design
Web Technologies
General Aptitude
Discrete Mathematics
Programming Languages
Computer Organization