Computer Organization
Computer Arithmetic
Marks 1Marks 2Marks 5
Machine Instructions and Addressing Modes
Marks 1Marks 2
Memory Interfacing
Marks 1Marks 2Marks 5
IO Interface
Marks 1Marks 2
Alu Data Path and Control Unit
Marks 1Marks 2
Secondary Memory
Marks 1Marks 2
1
GATE CSE 2000
Subjective
+5
-0
An instruction pipeline has five stages where each stage takes $$2$$ nanoseconds and all instructions use all five stages. Branch instructions are not overlapped, i.e., the instruction after the branch is not fetched till the branch instruction is completed. Under ideal conditions.

(a) Calculate the average instruction execution time assuming that $$20$$% of all instruction executed are branch instructions. Ignore the fact that some branch instructions may be conditional.

(b) If a branch instruction is a conditional branch instruction, the branch need not be taken. If the branch is not taken, the following instructions can be overlapped. When $$80$$% of all branch instructions are conditional branch instructions, and $$50$$% of the conditional branch instructions are such that the branch is taken, calculate the average instruction execution time.

2
GATE CSE 1999
Subjective
+5
-0
An instruction pipeline consists of $$4$$ stages: Fetch (F), Decode field (D), Execute (E), and Result-Write (W). The $$5$$ instructions in a certain instruction sequence need these stages for the different number of clock cycles as shown by the table below. GATE CSE 1999 Computer Organization - Pipelining Question 21 English

Find the number of clock cycles needed to perform the $$5$$ instructions

Questions Asked from Marks 5
GATE CSE Subjects
Theory of Computation
Operating Systems
Algorithms
Digital Logic
Database Management System
Data Structures
Computer Networks
Software Engineering
Compiler Design
Web Technologies
General Aptitude
Discrete Mathematics
Programming Languages
Computer Organization