Combinational Circuits
Practice Questions
Marks 2
1

Consider a digital logic circuit consisting of three 2-to-1 multiplexers M1, M2, and M3 as shown below. X1 and X2 are inputs of M1. X3 and X4 are inputs of M2. A, B, and C are select lines of M1, M2, and M3, respectively.

GATE CSE 2024 Set 1 Digital Logic - Combinational Circuits Question 2 English

For an instance of inputs X1=1, X2=1, X3=0, and X4=0, the number of combinations of A, B, C that give the output Y=1 is ______________

GATE CSE 2024 Set 1
2

A Boolean digital circuit is composed using two 4-input multiplexers (M1 and M2) and one 2-input multiplexer (M3) as shown in the figure. X0-X7 are the inputs of the multiplexers M1 and M2 and could be connected to either 0 or 1. The select lines of the multiplexers are connected to Boolean variables A, B and C as shown.

GATE CSE 2023 Digital Logic - Combinational Circuits Question 4 English

Which one of the following set of values of (X0, X1, X2, X3, X4, X5, X6, X7) will realise the Boolean function $$\overline A + \overline A \,.\,\overline C + A\,.\,\overline B \,.\,C$$ ?

GATE CSE 2023
3
Consider the two cascaded $$2$$-to-$$1$$ multiplexers as shown in the figure. GATE CSE 2016 Set 1 Digital Logic - Combinational Circuits Question 8 English

The minimal sum of products form of the output $$X$$ is

GATE CSE 2016 Set 1
4
Consider the $$4$$-to-$$1$$ multiplexer with two select lines $${S_1}$$ and $${S_0}$$ given below GATE CSE 2014 Set 1 Digital Logic - Combinational Circuits Question 9 English

The minimal sum-of-products form of the Boolean expression for the output $$F$$ of the multiplexer is

GATE CSE 2014 Set 1
5
Suppose only one multiplexer and one inverter are allowed to be used to implement any Boolean function of $$n$$ variables. What is the minimum size of the multiplexer needed?
GATE CSE 2007
6
Consider the circuit above. Which one of the following options correctly represents $$f(x,y,z)?$$ GATE CSE 2006 Digital Logic - Combinational Circuits Question 10 English
GATE CSE 2006
7
Consider the $$ALU$$ shown below GATE CSE 2003 Digital Logic - Combinational Circuits Question 11 English

If the operands are in $$2's$$ complement representation, which of the following operations can be performed by suitably setting the control lines $$K$$ and $${C_0}$$ only ( + and - denote addition and subtraction respectively)?

GATE CSE 2003
8
Consider the following multiplexer where $$10, 11, 12, 13$$ are four data input lines selected by two address line combinations $${A_1}\,{A_0} = 00,01,10,11$$ respectively and $$f$$ is the output of the multiplex (or). $$EN$$ is the Enable input. GATE CSE 2002 Digital Logic - Combinational Circuits Question 16 English

The function $$f(x,y,z)$$ implemented by the above circuit is

GATE CSE 2002
9
Consider the circuit shown below. The output of a $$2:1$$ Mux is given by the function $$(ac+bc)$$ GATE CSE 2001 Digital Logic - Combinational Circuits Question 17 English

Which of the following is true?

GATE CSE 2001
10
Consider the circuit in Fig. Which has a four bit binary number $${b_3}\,{b_2}\,{b_1}\,{b_0}\,$$ as input and a five bit binary number $${d_3}\,{d_2}\,{d_1}\,{d_0}\,$$ as output. The circuit implements: GATE CSE 1996 Digital Logic - Combinational Circuits Question 13 English
GATE CSE 1996
11
Consider the circuit in fig shown $$f$$ implements GATE CSE 1996 Digital Logic - Combinational Circuits Question 12 English
GATE CSE 1996
12
Fill in the blanks:
In the two bit full-adder/sub tractor unit shown in Fig., when the switch is in position $$2.$$ $$.....$$ using $$.....$$ arithmetic. GATE CSE 1990 Digital Logic - Combinational Circuits Question 14 English
GATE CSE 1990