Digital Logic
Boolean Algebra
Marks 1Marks 2Marks 5
Combinational Circuits
Marks 1Marks 2
Number Systems
Marks 1Marks 2
Sequential Circuits
Marks 1Marks 2Marks 5
1
GATE CSE 2025 Set 2
Numerical
+1
-0

In a 4-bit ripple counter, if the period of the waveform at the last flip-flop is 64 microseconds, then the frequency of the ripple counter in kHz is _________. (Answer in integer)

Your input ____
2
GATE CSE 2023
MCQ (Single Correct Answer)
+1
-0.33

The output of a 2-input multiplexer is connected back to one of its inputs as shown in the figure.

GATE CSE 2023 Digital Logic - Sequential Circuits Question 4 English

Match the functional equivalence of this circuit to one of the following options.

A
D Flip-flop
B
D Latch
C
Half-adder
D
Demultiplexer
3
GATE CSE 2018
Numerical
+1
-0
Consider the sequential circuit shown in the figure, where both flip-flops used are positive edge-triggered $$D$$ flip-flops. GATE CSE 2018 Digital Logic - Sequential Circuits Question 8 English

The number of states in the state transition diagram of this circuit that have a transition back to the same state on some value of “in” is _____.

Your input ____
4
GATE CSE 2016 Set 1
Numerical
+1
-0
We want to design a synchronous counter that counts the sequence $$0-1-0-2-0-3$$ and then repeats. The minimum number of $$J-K$$ flip-flops required to implement this counter is _________.
Your input ____
GATE CSE Subjects
Theory of Computation
Operating Systems
Algorithms
Digital Logic
Database Management System
Data Structures
Computer Networks
Software Engineering
Compiler Design
Web Technologies
General Aptitude
Discrete Mathematics
Programming Languages
Computer Organization