Computer Organization
Computer Arithmetic
Marks 1Marks 2Marks 5
Machine Instructions and Addressing Modes
Marks 1Marks 2
Memory Interfacing
Marks 1Marks 2Marks 5
IO Interface
Marks 1Marks 2
Alu Data Path and Control Unit
Marks 1Marks 2
Secondary Memory
Marks 1Marks 2
1
GATE CSE 2004
MCQ (Single Correct Answer)
+2
-0.6
Consider the following program segment for a hypothetical $$CPU$$ having three user registers $$R1,R2, $$ and $$R3.$$ GATE CSE 2004 Computer Organization - Machine Instructions and Addressing Modes Question 26 English

Let the clock cycles required for various operations be as follows:
Register to/from memory transfer:
$$3$$ clock cycles
ADD with both operands in register:
$$1$$ clock cycle
Instruction fetch and decode:
$$2$$ clock cycles per word

The total number of clock cycle required to execute the program is

A
$$29$$
B
$$24$$
C
$$23$$
D
$$20$$
2
GATE CSE 2001
MCQ (Single Correct Answer)
+2
-0.6
Which is the most appropriate match for the items in the first column with the items in the second column?
$$X.$$ Indirect Addressing
$$Y.$$ Indexed Addressing
$$Z.$$ Base Register Addressing
$${\rm I}.\,\,$$Array implementation
$${\rm II}.\,\,$$Writing relocatable code
$${\rm III}.\,\,$$Passing array as parameter
A
$$\left( {X,\,{\rm I}{\rm I}{\rm I}} \right),\,\,\left( {Y,\,{\rm I}} \right),\,\,\left( {Z,\,\,{\rm I}{\rm I}} \right)$$
B
$$\left( {X,\,{\rm I}{\rm I}} \right),\,\,\left( {Y,\,{\rm I}{\rm I}{\rm I}} \right),\,\,\left( {Z,\,\,{\rm I}} \right)$$
C
$$\left( {X,\,{\rm I}{\rm I}{\rm I}} \right),\,\,\left( {Y,\,{\rm I}{\rm I}} \right),\,\,\left( {Z,\,\,{\rm I}} \right)$$
D
$$\left( {X,\,{\rm I}} \right),\,\,\left( {Y,\,{\rm I}{\rm I}{\rm I}} \right),\,\,\left( {Z,\,\,{\rm I}{\rm I}} \right)$$
GATE CSE Subjects
Theory of Computation
Operating Systems
Algorithms
Digital Logic
Database Management System
Data Structures
Computer Networks
Software Engineering
Compiler Design
Web Technologies
General Aptitude
Discrete Mathematics
Programming Languages
Computer Organization