Under paged memory management scheme simple lock and key memory protection arrangement may still be required if the $$........$$ processors do not have address mapping hardware.

In a two -level virtual memory, the memory access time for main memory, $${t_M} = {10^{ - 8}}\sec $$ and the memory access time for the secondary memory, tag $$ = {10^{ - 3}}.$$ What must be the hit ratio, $$H$$ such that the access efficiency is within $$80$$ percent of its maximum value?

State whether the following statements are TRUE or FALSE with reason.
The Link-load -and-go loading scheme required less storange space than the Link-and-go loading scheme.

Match the pairs in the following question.

List - $${\rm I}$$
$$(A)$$$$\,\,\,\,$$ Virtual Memory
$$(B)$$$$\,\,\,\,$$ Shared memory
$$(C)$$$$\,\,\,\,$$ Look-ahead buffer
$$(D)$$$$\,\,\,\,$$ Look-aside buffer

List - $${\rm II}$$
$$(p)$$$$\,\,\,\,$$ Temporal locality
$$(q)$$$$\,\,\,\,$$ Spatial Locality
$$(r)$$$$\,\,\,\,$$ Address Translation
$$(s)$$$$\,\,\,\,$$ Mutual exclusion