Digital Electronics
Sequential Circuits
Marks 1Marks 2Marks 5
Microprocessor
Marks 1Marks 2Marks 3
Boolean Algebra
Marks 1Marks 2
Analog to Digital and Digital to Analog Converter
Marks 1Marks 2
Combinational Circuits
Marks 1Marks 2Marks 5
Minimization
Marks 2
Logic Families and Memories
Marks 1Marks 2
Logic Gates
Marks 1Marks 2
1
GATE EE 2002
MCQ (Single Correct Answer)
+1
-0.3
The frequency of the clock signal applied to the rising edge triggered $$D$$ flip-flop shown in Fig. is $$10$$ $$kHz.$$ The frequency of the signal available at $$Q$$ is GATE EE 2002 Digital Electronics - Sequential Circuits Question 24 English
A
$$10$$ $$kHz$$
B
$$2.5$$ $$kHz$$
C
$$20$$ $$kHz$$
D
$$5$$ $$kHz$$
2
GATE EE 1995
Fill in the Blanks
+1
-0
For a $$J$$-$$K$$ flip-flop its $$J$$ input is tied to its own $$Q$$ output and its $$K$$ input is connected to its own $$Q$$ output. If the flip-flop is fed with a clock of frequency $$1$$ $$MHz,$$ its $$Q$$ output frequency will be ______________
GATE EE Subjects
Electromagnetic Fields
Signals and Systems
Engineering Mathematics
General Aptitude
Power Electronics
Power System Analysis
Analog Electronics
Control Systems
Digital Electronics
Electrical Machines
Electric Circuits
Electrical and Electronics Measurement