Electronic Devices and VLSI
PN Junction
Marks 1Marks 2
Semiconductor Physics
Marks 1Marks 2
IC Basics and MOSFET
Marks 1Marks 2
BJT and FET
Marks 1Marks 2
1
GATE ECE 2016 Set 3
MCQ (Single Correct Answer)
+1
-0.3
The figure shows the band diagram of a Metal Oxide Semiconductor (MOS). The surface region of this MOS is in GATE ECE 2016 Set 3 Electronic Devices and VLSI - IC Basics and MOSFET Question 46 English
A
inversion
B
accumulation
C
depletion
D
flat band
2
GATE ECE 2015 Set 3
MCQ (Single Correct Answer)
+1
-0.3
Which one of the following processes is preferred to from the gate dielectric (SiO2) of MOSFETs?
A
Sputtering
B
Molecular beam epitaxy
C
Wet oxidation
D
Dry oxidation
3
GATE ECE 2014 Set 3
MCQ (Single Correct Answer)
+1
-0.3
In MOSFET fabrication, the channel length is defined during the process of
A
Isolation oxide growth
B
Channel stop implantation
C
Poly-silicon gate patterning
D
Lithography step leading to the contact pads
4
GATE ECE 2014 Set 2
MCQ (Single Correct Answer)
+1
-0.3
In CMOS technology, shallow P-well or N-well regions can be formed using
A
low pressure chemical vapour deposition
B
low energy sputtering
C
low temperature dry oxidation
D
low energy ion-implantation
GATE ECE Subjects
Signals and Systems
Network Theory
Control Systems
Digital Circuits
General Aptitude
Electronic Devices and VLSI
Analog Circuits
Engineering Mathematics
Microprocessors
Communications
Electromagnetics