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Microprocessors
Pin Details of 8085 and Interfacing with 8085
Marks 1Marks 2
Instruction Set and Programming with 8085
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1
GATE ECE 1997
MCQ (Single Correct Answer)
+1
-0.3
The decoding circuit shown below has been used to generate the active low chip select signal for a microprocessor peripheral. (The address lines are designated as $${A_0}$$ to $${A_7}$$ for I-O address) GATE ECE 1997 Microprocessors - Pin Details of 8085 and Interfacing with 8085 Question 3 English
A
60 H to H
B
A 4 H to A7 H
C
50 H to AF H
D
70 H to 73 H
2
GATE ECE 1995
MCQ (Single Correct Answer)
+1
-0.3
In a microprocessor, when a CPU is interrupted, it
A
Stops execution of instructions.
B
Acknowledges interrupt and branches of subroutine.
C
Acknowledges interrupt and continues.
D
Acknowledges interrupt and waits for the next instrution from the interrupting device.
3
GATE ECE 1993
MCQ (Single Correct Answer)
+1
-0.3
In a microcomputer, wait states are used to
A
make the processor wait during a DMA operation
B
make the processor wait during an interrupt processing
C
make the processor wait during a power shutdown
D
interface slow peripherals to the processor
4
GATE ECE 1992
MCQ (More than One Correct Answer)
+1
-0
In an 8085 microprocessor system with memory mapped I/O,
A
I/O devices have 16 bit addresses
B
I/O devices are accessed using IN and OUT instructions
C
there can be a maximum of 256 input devices and 256 output devices
D
arithmetic and logic operations can be directly performed with the I/O data.
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Questions Asked from Marks 1
GATE ECE 2010 (2) GATE ECE 2000 (2) GATE ECE 1999 (1) GATE ECE 1998 (1) GATE ECE 1997 (2) GATE ECE 1995 (1) GATE ECE 1993 (1) GATE ECE 1992 (1) GATE ECE 1988 (3)
GATE ECE Subjects
Signals and Systems
Network Theory
Control Systems
Digital Circuits
General Aptitude
Electronic Devices and VLSI
Analog Circuits
Engineering Mathematics
Microprocessors
Communications
Electromagnetics