Digital Circuits
Number System and Code Convertions
Marks 1Marks 2
Sequential Circuits
Marks 1Marks 2Marks 5Marks 8
Semiconductor Memories
Marks 1Marks 2
Logic Families
Marks 1Marks 2Marks 8
Analog to Digital and Digital to Analog Converters
Marks 1Marks 2
1
GATE ECE 2024
MCQ (Single Correct Answer)
+2
-1.33

The sequence of states $(Q_1 Q_0)$ of the given synchronous sequential circuit is ________.

GATE ECE 2024 Digital Circuits - Sequential Circuits Question 3 English

A

00 → 10 → 11 → 00

B

11 → 00 → 10 → 01 → 00

C

01 → 10 → 11 → 00 → 01

D

00 → 01 → 10 → 00

2
GATE ECE 2023
Numerical
+2
-0

In a given sequential circuit, initial states are Q$$_1$$ = 1 and Q$$_2$$ = 0. For a clock frequency of 1 MHz, the frequency of signal Q$$_2$$ in kHz, is ___________ (rounded off to the nearest integer).

GATE ECE 2023 Digital Circuits - Sequential Circuits Question 5 English

Your input ____
3
GATE ECE 2022
MCQ (Single Correct Answer)
+2
-0.67

for the circuit shown, the clock frequency is f0 and the duty cycle is 25%. For the signal at the Q output of the Flip-Flop, ___________.

GATE ECE 2022 Digital Circuits - Sequential Circuits Question 7 English

A
frequency is f0/4 and duty cycle is 50%
B
frequency is f0/4 and duty cycle is 25%
C
frequency is f0/2 and duty cycle is 50%
D
frequency is f0 and duty cycle is 25%
4
GATE ECE 2022
MCQ (More than One Correct Answer)
+2
-0

A state transition diagram with states A, B, and C, and transition probabilities p1, p2, ....., p7 is shown in the figure (e.g., p1 denotes the probability of transition from state A to B). For this state diagram, select the statements which is/are universally true.

GATE ECE 2022 Digital Circuits - Sequential Circuits Question 6 English

A
p2 + p3 = p5 + p6
B
p1 + p3 = p4 + p6
C
p1 + p4 + p7 = 1
D
p2 + p5 + p7 = 1
GATE ECE Subjects
Signals and Systems
Network Theory
Control Systems
Digital Circuits
General Aptitude
Electronic Devices and VLSI
Analog Circuits
Engineering Mathematics
Microprocessors
Communications
Electromagnetics