Analog Circuits
Bipolar Junction Transistor
Marks 1Marks 2Marks 5
Operational Amplifier
Marks 1Marks 2Marks 5Marks 8
Frequency Response
Marks 1Marks 2Marks 5
Feedback Amplifier
Marks 1Marks 2
Power Amplifier
Marks 1Marks 2
1
GATE ECE 2025
MCQ (Single Correct Answer)
+2
-0.67

The identical MOSFETs $M_1$ and $M_2$ in the circuit given below are ideal and biased in the saturation region. $M_1$ and $M_2$ have a transconductance $g_m$ of 5 mS .

The input signals (in Volts) are:

$$ \begin{aligned} & V_1=2.5+0.01 \sin \omega t \\ & V_2=2.5-0.01 \sin \omega t \end{aligned} $$

The output signal $V_3$ (in Volts) is _ .

GATE ECE 2025 Analog Circuits - FET and MOSFET Question 1 English

A
$3+0.05 \sin \omega t$
B
$3-0.1 \sin \omega t$
C
$4+0.1 \sin \omega t$
D
$4-0.05 \sin \omega t$
2
GATE ECE 2024
MCQ (Single Correct Answer)
+2
-1.33

In the circuit shown below, the transistors $M_1$ and $M_2$ are biased in saturation. Their small signal transconductances are $g_{m1}$ and $g_{m2}$ respectively. Neglect body effect, channel length modulation and intrinsic device capacitances.

GATE ECE 2024 Analog Circuits - FET and MOSFET Question 4 English

Assuming that capacitor $C_i$ is a short circuit for AC analysis, the exact magnitude of small signal voltage gain $\left| \frac{v_{out}}{v_{in}} \right|$ is ______.

A

$g_{m2}R_D$

B

$\frac{g_{m2} R_D \left( R_B + \frac{1}{g_{m1}} \right)}{R_B + \frac{1}{g_{m1}} + R_S}$

C

$\frac{g_{m2} R_D \left( R_B + \frac{1}{g_{m1}} + R_S \right)}{R_B + \frac{1}{g_{m1}}}$

D

$\frac{g_{m2} R_D \left( \frac{1}{g_{m1}} \right)}{\frac{1}{g_{m1}} + R_S}$

3
GATE ECE 2024
Numerical
+2
-0

An NMOS transistor operating in the linear region has $I_{D}$ of 5 $\mu$A at $V_{DS}$ of 0.1 V. Keeping $V_{GS}$ constant, the $V_{DS}$ is increased to 1.5 V.

Given that $\mu_{n}C_{ox} \frac{W}{L}$ = 50 $\mu$A/$V^2$, the transconductance at the new operating point (in $\mu$A/V, rounded off to two decimal places) is ______.

Your input ____
4
GATE ECE 2022
MCQ (Single Correct Answer)
+2
-0.67

Consider an ideal long channel nMOSFET (enhancement-mode) with gate length 10 $$\mu$$m and width 100 $$\mu$$m. The product of electron mobility ($$\mu$$n) and oxide capacitance per unit area (Cox) is $$\mu$$nCox = 1 mA/V2. The threshold voltage of the transistor is 1 V. For a gate-to-source voltage VGS = [2 $$-$$ sin(2t)] V and drain-to source voltage VDS = 1 V (substrate connected to the source), the maximum value of the drain-to-source current is ___________.

A
40 mA
B
20 mA
C
15 mA
D
5 mA
GATE ECE Subjects
Signals and Systems
Network Theory
Control Systems
Digital Circuits
General Aptitude
Electronic Devices and VLSI
Analog Circuits
Engineering Mathematics
Microprocessors
Communications
Electromagnetics