Digital Circuits
Number System and Code Convertions
Marks 1Marks 2
Sequential Circuits
Marks 1Marks 2Marks 5Marks 8
Semiconductor Memories
Marks 1Marks 2
Logic Families
Marks 1Marks 2Marks 8
Analog to Digital and Digital to Analog Converters
Marks 1Marks 2
1
GATE ECE 2023
Numerical
+1
-0

For the circuit shown below, the propagation delay of each NAND gate is 1 ns. The critical path delay, in ns, is __________ (rounded off to the nearest integer).

GATE ECE 2023 Digital Circuits - Logic Gates Question 2 English

Your input ____
2
GATE ECE 2016 Set 3
MCQ (Single Correct Answer)
+1
-0.3
The minimum number of 2-input NAND gates required to implement a 2-input XOR gate is
A
4
B
5
C
6
D
7
3
GATE ECE 2016 Set 1
MCQ (Single Correct Answer)
+1
-0.3
The output of the combinational circuit given below is GATE ECE 2016 Set 1 Digital Circuits - Logic Gates Question 20 English
A
A+B+C
B
A(B+C)
C
B(C+A)
D
C(A+B)
4
GATE ECE 2015 Set 2
MCQ (Single Correct Answer)
+1
-0.3
In the figure shown, the output Ü» is required to be Ü» Y=AB+ $$\overline C $$$$\overline D $$. The gates G1 and G2 must be, respectively, GATE ECE 2015 Set 2 Digital Circuits - Logic Gates Question 18 English
A
NOR, OR
B
OR, NAND
C
NAND, OR
D
AND, NAND
GATE ECE Subjects
Signals and Systems
Network Theory
Control Systems
Digital Circuits
General Aptitude
Electronic Devices and VLSI
Analog Circuits
Engineering Mathematics
Microprocessors
Communications
Electromagnetics