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Digital Circuits
Number System and Code Convertions
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Logic Gates
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Combinational Circuits
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Sequential Circuits
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Semiconductor Memories
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Analog to Digital and Digital to Analog Converters
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1
GATE ECE 2014 Set 4
MCQ (Single Correct Answer)
+2
-0.6
An 8-to-1 multiplexer is used to implement a logical function Y as shown in the figure. The output Y is given by GATE ECE 2014 Set 4 Digital Circuits - Combinational Circuits Question 26 English
A
Y= A$$\overline B \,C + A\overline C D$$
B
$$Y = \overline A BC + A\overline B D$$
C
$$Y = AB\overline C + \overline A CD$$
D
$$Y = \overline A \,\overline B D + A\overline B C$$
2
GATE ECE 2014 Set 4
Numerical
+2
-0
A 16-bit ripple carry adder is realized using 16 identical full adders (FA) as shown in the figure. The carry-propagation delay of each FA is 12 ns and the sum-propagation delay of each FA is 15 ns. The worst case delay (in ns) of this 16-bit adder will be_______________. GATE ECE 2014 Set 4 Digital Circuits - Combinational Circuits Question 25 English
Your input ____
3
GATE ECE 2014 Set 3
MCQ (Single Correct Answer)
+2
-0.6
If X and Y are inputs and the Difference (D = X – Y) and the Borrow (B) are the outputs, which one of the following diagrams implements a half-subtractor?
A
GATE ECE 2014 Set 3 Digital Circuits - Combinational Circuits Question 27 English Option 1
B
GATE ECE 2014 Set 3 Digital Circuits - Combinational Circuits Question 27 English Option 2
C
GATE ECE 2014 Set 3 Digital Circuits - Combinational Circuits Question 27 English Option 3
D
GATE ECE 2014 Set 3 Digital Circuits - Combinational Circuits Question 27 English Option 4
4
GATE ECE 2014 Set 3
MCQ (Single Correct Answer)
+2
-0.6
In the circuit shown, 𝑊𝑊 and 𝑌𝑌 are MSBs of the control inputs. The output 𝐹𝐹 is given by GATE ECE 2014 Set 3 Digital Circuits - Combinational Circuits Question 28 English
A
$$F = \,W\overline X + \overline W X + \overline Y \,\overline Z $$
B
$$F = \,W\overline X + \overline W X + \overline Y \,Z$$
C
$$F = \,W\overline X \,\overline Y + \overline W X\,\overline Y $$
D
$$F = \,(\overline W + \overline X )\,\,\overline Y \,\overline Z $$
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Questions Asked from Marks 2
GATE ECE 2024 (2) GATE ECE 2018 (1) GATE ECE 2017 Set 2 (2) GATE ECE 2016 Set 1 (2) GATE ECE 2016 Set 3 (1) GATE ECE 2015 Set 2 (1) GATE ECE 2014 Set 4 (2) GATE ECE 2014 Set 3 (2) GATE ECE 2010 (1) GATE ECE 2009 (1) GATE ECE 2008 (1) GATE ECE 2007 (1) GATE ECE 2004 (1) GATE ECE 2003 (2) GATE ECE 2001 (1) GATE ECE 1999 (1)
GATE ECE Subjects
Signals and Systems
Network Theory
Control Systems
Digital Circuits
General Aptitude
Electronic Devices and VLSI
Analog Circuits
Engineering Mathematics
Microprocessors
Communications
Electromagnetics