GATE ECE 2015 Set 1 | Logic Gates Question 10 | Digital Circuits

All the logic gates shown in the figure have a propagation delay of 20 ns. Let A = C = 0 and B = 1 until time t = 0. At t = 0, all the inputs flip (i.e., A = C = 1 and B = 0) and remain in that state. For t > 0, output Z = 1 for a duration (in ns) of ______________. GATE ECE 2015 Set 1 Digital Circuits - Logic Gates Question 10 English

Your input ____

GATE ECE 2015 Set 1

MCQ (Single Correct Answer)

-0.6

A 3-input majority gate is defined by the logic function M (a,b,c) = ab+bc+ca. Which one of the following gates is represented by the function M$$\left( {\overline {M\left( {a,b,c} \right),} M\left( {a,b,\overline c } \right),c} \right)?$$

3-Input NAND gate

3-Input XOR gate

3-Input NOR gate

3-Input XNOR gate

GATE ECE 2014 Set 1

MCQ (Single Correct Answer)

-0.6

The output F in the digital logic circuit shown in the figure is GATE ECE 2014 Set 1 Digital Circuits - Logic Gates Question 12 English

$$F\, = \overline X YZ + X\overline Y Z$$

$$F\, = \,\overline X \overline Y Z + XYZ$$

$$F\, = \,\overline X \overline Y \overline {Z + } XYZ$$

GATE ECE 2008

MCQ (Single Correct Answer)

-0.6

Which of the follwing Boolean expression correctly represents the relation between P, Q, R and M₁?

GATE ECE 2008 Digital Circuits - Logic Gates Question 13 English