GATE ECE 1987 | Sequential Circuits Question 72 | Digital Circuits

A ripple counter using negative edge-triggered D-flip flops is shown in Fig.1. The flip-flops are cleared to '0' by a '0' at the R input. The feedback logic is to be designed to obtain the count sequence shown in the same figure. The correct feedback logic is: GATE ECE 1987 Digital Circuits - Sequential Circuits Question 14 English 1

GATE ECE 1987 Digital Circuits - Sequential Circuits Question 14 English 1

GATE ECE 1987 Digital Circuits - Sequential Circuits Question 14 English 2

$$F\, = \overline {{Q_2}{Q_1}\overline {{Q_0}} } $$

$$F\, = \,{Q_2}\,\overline {{Q_1}} \overline {{Q_0}} $$

$$F\, = \,\overline {{Q_2}} \overline {{Q_1}} {Q_0}$$

$$F\, = \,\overline {{Q_2}} \overline {{Q_1}} \overline {{Q_0}} $$

GATE ECE 1987

MCQ (Single Correct Answer)

-0.3

Choose the correct statements relating to the circuit of figure GATE ECE 1987 Digital Circuits - Sequential Circuits Question 10 English

For V_i = -2V, P=0

For V_i = +3V, P=0

For V_i = 0V, P=0 always

For V_i = 0V, P can be either 0 or 1.

GATE ECE Subjects

Signals and Systems

Network Theory

Control Systems

Digital Circuits

General Aptitude

Electronic Devices and VLSI

Analog Circuits

Engineering Mathematics

Microprocessors

Communications

Electromagnetics