Operating Systems
Process Concepts and Cpu Scheduling
Marks 1Marks 2
Synchronization and Concurrency
Marks 1Marks 2
Memory Management
Marks 1Marks 2Marks 5
File System IO and Protection
Marks 1Marks 2Marks 5
1
GATE CSE 2007
MCQ (Single Correct Answer)
+2
-0.6
A process has been allocated $$3$$ page frames. Assume that none of the pages of the process are available in the memory initially. The process makes the following sequence of page references (reference string): $$$1, 2, 1, 3, 7, 4, 5, 6, 3, 1$$$

If optimal page replacement policy is used, how many page faults occur for the above reference string?

A
$$7$$
B
$$8$$
C
$$9$$
D
$$10$$
2
GATE CSE 2007
MCQ (Single Correct Answer)
+2
-0.6
A process has been allocated $$3$$ page frames. Assume that none of the pages of the process are available in the memory initially. The process makes the following sequence of page references (reference string): $$$1, 2, 1, 3, 7, 4, 5, 6, 3, 1$$$

Least Recently Used (LRU) page replacement policy is a practical approximation to optimal page replacement. For the above reference string, how many more page faults occur with LRU than with the optimal page replacement policy?

A
$$0$$
B
$$1$$
C
$$2$$
D
$$3$$
3
GATE CSE 2006
MCQ (Single Correct Answer)
+2
-0.6
A Computer system supports $$32$$-bit virtual addresses as well as $$32$$-bit physical addresses. Since the virtual address space is of the same size as the physical address space, the operating system designers decide to get rid of the virtual memory entirely. Which one of the following is true?
A
Efficient implementation of multi-user support is no longer possible.
B
The processor cache organization can be made more efficient now.
C
Hardware support for memory management is no longer needed.
D
$$CPU$$ scheduling can be made more efficient now.
4
GATE CSE 2004
MCQ (Single Correct Answer)
+2
-0.6
Consider a System with a two-level paging scheme in which a regular memory access takes $$150$$ nanoseconds, and servicing a page fault takes $$8$$ milliseconds. An average instruction takes $$100$$ nanoseconds of $$CPU$$ time, and two memory accesses. The $$TLB$$ hit ratio is $$90$$% and the page fault rate is one in every $$10,000$$ instructions. What is the effective average instruction execution time?
A
$$645$$ nanoseconds
B
$$1050$$ nanoseconds
C
$$1215$$ nanoseconds
D
$$1230$$ nanoseconds
GATE CSE Subjects
Theory of Computation
Operating Systems
Algorithms
Digital Logic
Database Management System
Data Structures
Computer Networks
Software Engineering
Compiler Design
Web Technologies
General Aptitude
Discrete Mathematics
Programming Languages
Computer Organization