Digital Circuits
1
GATE ECE 2025
Numerical
+1
-0
A 4-bit weighted-resistor DAC with inputs $b_3, b_2, b_1$, and $b_0$ (MSB to LSB) is designed using an ideal opamp, as shown below. The switches are closed when the corresponding input bits are logic ' 1 ' and open otherwise.
When the input $b_3 b_2 b_1 b_0$ changes from 1110 to 1101, the magnitude of the change in the output voltage $V_O$ (in mV , rounded off to the nearest integer) is ____________.
Your input ____
2
GATE ECE 2023
Numerical
+1
-0
The signal-to-noise ratio (SNR) of an ADC with a full-scale sinusoidal input is given to be 61.96 dB. The resolution of the ADC is __________ bits (rounded off to the nearest integer).
Your input ____
3
GATE ECE 2015 Set 1
Numerical
+1
-0
Consider a four bit D to A converter. The analog value corresponding to digital signals of values 0000 and 0001 are 0 V and 0.0625 V respectively. The analog value (in Volts ) corresponding to the digitals signal 1111 is ______________.
Your input ____
4
GATE ECE 2002
MCQ (Single Correct Answer)
+1
-0.3
The number of comparators required in a 3-bit comparator type ADC is
GATE ECE Subjects
Signals and Systems
Network Theory
Control Systems
Digital Circuits
General Aptitude
Electronic Devices and VLSI
Analog Circuits
Engineering Mathematics
Microprocessors
Communications
Electromagnetics