GATE EE 2010 | Logic Families and Memories Question 1 | Digital Electronics

The $$TTL$$ circuit shown in the figure is fed with the waveform $$X$$ (also shown). All gates have equal propagation delay of $$10$$ $$ns.$$ The output $$Y$$ of the circuit is GATE EE 2010 Digital Electronics - Logic Families and Memories Question 2 English 1

GATE EE 2010 Digital Electronics - Logic Families and Memories Question 2 English 1

GATE EE 2010 Digital Electronics - Logic Families and Memories Question 2 English 2

GATE EE 2010 Digital Electronics - Logic Families and Memories Question 2 English Option 1

GATE EE 2010 Digital Electronics - Logic Families and Memories Question 2 English Option 2

GATE EE 2010 Digital Electronics - Logic Families and Memories Question 2 English Option 3

GATE EE 2010 Digital Electronics - Logic Families and Memories Question 2 English Option 4

GATE EE 2006

MCQ (Single Correct Answer)

-0.6

A TTL NOT gate circuit is shown in figure. Assuming $${V_{BE}} = 0.7\,v$$ of both the transistors, if $${V_i} = 3.0\,V,$$ then the states of the two transistors will be GATE EE 2006 Digital Electronics - Logic Families and Memories Question 1 English

GATE EE 2006 Digital Electronics - Logic Families and Memories Question 1 English

$${Q_1}\,\,ON$$ and $${Q_2}\,\,OFF$$

$${Q_1}$$ reverse $$\,\,ON$$ and $${Q_2}\,\,OFF$$

$${Q_1}$$ reverse $$\,\,ON$$ and $${Q_2}\,\,ON$$

$${Q_1}\,\,OFF$$ and $${Q_2}$$ reverse $$\,\,ON$$

Questions Asked from Marks 2

GATE EE 2010 (1) GATE EE 2006 (1)

GATE EE Subjects

Electromagnetic Fields

Signals and Systems

Engineering Mathematics

General Aptitude

Power Electronics

Power System Analysis

Analog Electronics

Control Systems

Digital Electronics

Electrical Machines

Electric Circuits

Electrical and Electronics Measurement